1. Field of the Invention
The present invention relates to a multi-value level read only memory (ROM), and more particularly, to
decoding of information read out from a pair of memory cells simultaneously.
2. Description of the Related Art
The development of multi-value level memory cells is drawing great attention as a way in which to enhance the integration degree of read only memories (ROM's), and there are disclosures in the prior art using four value level cells, from among multi-value levels (For example, U.S. Pat. Nos. 4,503,518, 4,449,203, and I.E.E.E., J. of Solid State Circuits, Vol. SC-16, No. 5 Oct. pp. 522-529). Nevertheless, the relationship between the yield of the devices and a number of multi-values is antagonistic, and it is not always possible to ensure that the enhancement of the number of multi-values corresponds to an improved mass-production. With regard to the memory cell producing one of three value levels, as an example of the memory cell producing one of multi-value levels, a problem arises in that satisfactory results have not been obtained as yet, because the read out data from one memory cell cannot be processed as binary data.